Conventionally, a SOI (silicon on insulator) substrate that is a silicon substrate in which a monocrystal silicon layer is formed on a surface of an insulation layer has been known. By forming a device such as a transistor on a SOI substrate, parasitic capacitance can be reduced and insulation resistance can be increased. That is, high-integration and high-performance for a device can be achieved. The insulation layer is formed of, for example, a silicon oxide (SiO2) film.
To increase an operation speed of a device and further reduce parasitic capacitance of the device, the SOI substrate is preferably formed so that a monocrystal silicon layer has a small thickness. Then, conventionally, a method in which a silicon substrate is bonded to some other substrate such as a glass substrate and then part of the silicon substrate is removed by separation, thereby forming a SOI substrate, has been known (see, for example, Non-Patent Document 1).
Hereinafter, a method for forming a SOI substrate by bonding will be described with reference to FIG. 20 to FIG. 23. Among various techniques for reducing the thickness of a SOI layer, such as chemical polishing and a technique using porous silicon, a method using hydrogen implantation will be herein described. First, as shown in FIG. 20, a surface of a silicon substrate 101 serving as a first substrate is treated by oxidation, thereby forming a silicon oxide (SiO2) layer 102 serving as an insulation layer. Next, as shown in FIG. 21, ions of hydrogen, i.e., a peeling material are implanted into the silicon substrate 101 through the silicon oxide (SiO2) layer 102. Thus, a hydrogen-implanted layer 104 serving as a peeling layer is formed in part of the silicon substrate 101 located at a predetermined depth. Subsequently, RCA cleaning or like substrate surface cleaning is performed, and then, as shown in FIG. 22, a second substrate such as a glass substrate 103 is bonded to a surface of the silicon oxide layer 102. Thereafter, heat treatment is performed, so that a micro-clack is formed in part of the silicon substrate 101 located at the depth where hydrogen ions have been implanted. Thus, as shown in FIG. 23, part of the silicon substrate 101 is separated along the hydrogen-implanted layer 104. In this manner, the thickness of the silicon substrate 101 is reduced, thereby obtaining a silicon layer 101. After separation, the thickness of the silicon layer 101 is reduced to a desired thickness using polishing, etching or other various techniques as necessary. Also, using heat treatment or the like, crystal defects generated by hydrogen implantation is repaired and a silicon surface is smoothed.
As described above, the SOI substrate where the SiO2 layer (insulating layer) 102 is formed on the surface of the silicon substrate (second substrate) 103 and the silicon layer 101 is thinly formed on the surface of the SiO2 layer 102 is produced. Non-Patent Document 1: Michel Bruel, “Smart-Cut: A New Silicon On Insulator Material Technology Based on Hydrogen Implantation and Wafer Bonding,” Jpn. J. Appl. Phys., Vol. 36 (1997), pp. 1636 to 1641.